电子琴设计VHDL代码单片机解密
单片机解密顶层程序与仿真 单片机解密顶层VHDL程序 --文件名:top.vhd --功能:顶层文件 --最后修改日期:2004.3.20 library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; entity top is Port ( clk32MHz :in std_logic; --32MHz系统时钟 handTOauto : in std_logic; --键盘输入/自动演奏 code1 :out std_logic_vector(6 downto 0); --音符显示信号 index1 :in std_logic_vector(7 downto 0); --键盘输入信号 high1 :out std_logic; --高低音节信号 spkout :out std_logic); --音频信号 end top; architecture Behavioral of top is component automusic Port ( clk :in std_logic; Auto: in std_logic; index2:in std_logic_vector(7 downto 0); index0 : out std_logic_vector(7 downto 0)); end component; component tone Port ( index : in std_logic_vector(7 downto 0); code : out std_logic_vector(6 downto 0); high : out std_logic; tone0 : out integer range 0 to 2047); end component; component speaker Port ( clk1 : in std_logic; tone1 : in integer range 0 to 2047; spks : out std_logic); end component; signal tone2: integer range 0 to 2047; signal indx:std_logic_vector(7 downto 0); begin |

芯片解密